![]() The minimum input frequency of this stage is not limited by the lower specification of 10 MHz of the mixer, but by the intermediate frequency (IF) as approaching this frequency causes an effectively dead band. ![]() The first stage of the receivers utilizes an Analog Devices ADL5801 double balanced active mixer. While the reference path does not require the same high dynamic range as the measurement path, identical design improves total accuracy as errors caused by some external factors, for example slight supply voltage fluctuations and temperature changes, are correlated. The lower frequency limit is governed by DC-blocking capacitors and the amplifiers bias circuitry.īoth receivers are of identical two stage superheterodyne design. The reference signal is split off after this stage by an unequal resistive divider. The correction values have been acquired by characterization. Level control and power linearization is done in software by setting the attenuation through a look-up-table. This stage consists of a digitally controlled attenuator and a gain-block amplifier. The source is selected through a RF switch which feeds the final output stage. The output is amplified and filtered through a discrete LC network. ![]() Lower frequencies are generated by a 250 MS/s Direct-Digital-Synthesis (DDS) IC, an Analog Devices AD9913. After generation the signal travels through one of five selectable ceramic low pass filters, of which the edge frequencies are staggered to minimize output distortion. The very wide frequency range from 10 kHz to 6 GHz is achieved by utilizing two independent sources.įrequencies above 50 MHz are generated by a Fractional-N phase-locked loop (PLL) with integrated voltage controlled oscillators (VCOs) and output dividers, a Maxim Integrated MAX2871 integrated circuit (IC).
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